Efficiency analysis of techniques for weighting elements arrangement on the chip of unary digital-to-analog converter

Resumo

The paper presents a review of realizations of the matrices of unaryDACweighting elements. A mathematical model of unary DAC taking into account the systematic error has been built. The static characteristics were simulated, and conclusions were made regarding the preferred techniques of forming the matrix of weighting elements for reducing the nonlinearity of unary DACs.